A penetration test tells whether the existing defensive measures employed on the system are strong enough to prevent any security break. Understand how T&VS Automotive services help you protect &…
We are happy to announce part 3 of the IESA Annual Member Meet webinar series, in which Tessolve CEO Mr. P Raja Manickam, will be addressing the opportunities and the…
Hero Electronix, the parent company of Tessolve, launched another brand under its umbrella last week. The new brand - Qubo - will launch a series of AI-powered intelligent home appliances,…
Using the SMARC standard 2.0 for embedded modules, Tessolve Embedded Systems introduces ultra-low power ARM COMs (Computer-On-Module) based on the Qualcomm SnapdragonSD820 Family which is powered by 64-bit ARMv8-compliant quad-core…
Tessolve strengthened its work in the field of Near Field Communication (NFC) based on hybrid technology work as the industry transitioned into the new technological world by adding automation process…
Tessolve kicks off the multi-city, multi-country demonstration of its TERA device, a key next Generation NXP technology (S32G274A based SMARC SoM) based on state-of-the-art Application Gateway at NXP Technology Days…
Tessolve, a leading semiconductor engineering service partner, was an integral part of the ITC Test Week India 2022, at Radisson Blue Hotel, Bengaluru between July 24-26. The booth highlighted the…
Tessolve participated at the SemiconIndia 2022, the post-COVID gigantic conference in the Semiconductor industry. The Hon’ble Prime Minister of India, Shri Narendra Modi, inaugurated the conference via Video Conference on…
Tessolve, a Hero Electronix venture and an end-to-end engineering solution partner for semiconductor and system companies, is pleased to announce the appointment of two industry veterans, Huzefa Cutlerywala as Senior…
Tessolve announces its inaugural run of its Test Engineering Lab in San Jose on Mar 23. We offer access to test engineering and program development experts and access to testers.…
We are glad to announce the release of the Jan 22 edition of our Newsletter, First Bin. The newsletter contains a note from our CEO’s Desk, Tessolve Showcase article, and…
Tessolve’s and DynamoEdge have announced a partnership to deliver the fastest end-to-end mobility solutions powered by AT&T 5G. The strategic collaboration of Tessolve with DynamoEdge has paved the way to…
The partnership will allow showcasing our end-to-end capabilities in supporting Industrial and Automotive OEM’s safety-related Hardware modules, associated Software technology, innovative Automotive product development, and system validation for various customers…
Tessolve has joined the GlobalFoundries® (GF®) Design Enablement Network Program. The strategic partnership with GF aims to bring state-of-the-art design solutions across multiple end markets including automotive, industrial, server, graphics,…
We are thrilled to share another milestone to Tessolve’s journey with the recognition Tessolve has achieved by SiliconIndia among The 10 Best Electronics Companies to Work For in Bangalore 2021.…
Tessolve is now a member of the Arm® Approved Design Partner program, a global network of product design service companies endorsed by Arm. Tessolve's strategic partnership with ARM aims at…
Tessolve, a Hero Electronix venture expands its operations to multiple locations globally this year, including Japan, Taiwan, Thailand, Philippines, and Vietnam to accelerate Tessolve’s ability to provide value to customers…
Tessolve, a Hero Electronix venture and an end-to-end engineering solution partner for semiconductor and product companies, announces that leading Singapore based PE firm Novo Tellus Capital Partners has invested $40M…
We are proud to announce that Tessolve Semiconductor Pvt. Ltd. is now an IPC member facility. The IPC membership is mainly focused on electronic interconnect industries & brings together the…
Tessolve, a Hero Electronix venture and an end-to-end engineering solution partner for semiconductor and product companies, announces its expansion of Japanese operations indicating its global expansion strategy to drive international…
Tessolve, a Hero Electronix venture and an end-to-end engineering solution partner for semiconductor and product companies, has announced a new Edge AI Integrator solution to transform customer’s connected products into…
We are pleased to announce that the Tessolve Embedded team has Collaborated with Kaapi machines in successfully enabling IOT integration of a commercial coffee vending machine. The scope of the…
2020 adds another milestone to Tessolve’s journey with the recognition as the Best in Service and Responsiveness Emerging Supplier Award, supported by its competent engineering team. The accolade was announced…
Tessolve has forged another significant partnership leveraging its advanced engineering capabilities and end-to-end product design services in the embedded domain. Recently, we were recognized as an Engineering Solution Partner by…
Tessolve steps into a new era as senior leaders begin their elevated journeys, guiding the now and the next steps of the company. We’re proud to announce that our Co-founder…
Tessolve is the market leader in providing engineering solutions for silicon and systems development. Tessolve has taken a further step to establish Centres of Excellence (COE) in the various areas…
The credibility of our Reliability Lab has covered a significant mileage with the recent National Accreditation Board for Testing and Calibration Laboratories (NABL) accreditation. A formal recognition of the lab’s…
Our journey to becoming the foundation of new innovations in silicon engineering crosses another milestone, with Tessolve announced as an In-Kind Partner (IKP) of Silicon Catalyst. The global silicon solutions…
T&VS and Tessolve delivered a webinar on the 23rd April 2020, the topic on Dockerize your testing to enable virtual environments. We demonstrated best practice on how to Dockerize your…
DVClub Europe Meeting – April 2020 Event at a Glance Tuesday 21st April, 202012:00 – 13:20 BSTFREE to attend Online Verification of AI Designs With the proliferation of IP and…
Recent years have seen a growing demand for a robust semiconductor supply chain in Asia. The challenges thrown by Novel Corona Virus Disease has further disrupted the region’s supply, and…
Tessolve consolidated its position as a leading multinational engineering solution provider with the acquisition of Test & Verification Solutions (T&VS). Tessolve, a part of the Hero Electronics group will now…
Tessolve is now a proud member of LUX Photonics Consortium and will be part of the Photonics ecosystem in Singapore. We are basically 'the catalysts' to propel Singapore's Photonics Industry,…
Last week, Tessolve participated in the 22nd edition of Bengaluru Tech Summit 2019, organized by the Dept. of IT & BT, Government of Karnataka. The summit, held at the Bengaluru…
Tessolve participated at the Qualcomm Information Forum 2019, reinforcing its commitment to engineering new possibilities for Qualcomm. The event, held at Whitefield, Bengaluru on 17th October 2019, was the platform…
Tessolve Highlights Its Product Engineering At The India Mobile Congress 2019 With Qualcomm And Hero Electronix Tessolve participated at the India Mobile Congress 2019 along with its parent company -…
Hero Electronix, the parent company of Tessolve, launched another brand under its umbrella last week. The new brand - Qubo - will launch a series of AI-powered intelligent home appliances,…
Commemorating its 15th year of semiconductor engineering journey, Tessolve hosted a lunch panel at the GSA Silicon Summit on 18th June at Santa Clara, California.
Tessolve recently participated at the NI Week 2019 event, which was successfully orchestrated by National Instruments, between May 20-23 in Austin, Texas.
On 12th May, Tessolve had organized the Tessolve Family Run at the Gold Coins Club & Resort, which witnessed positive responses, right from the registrations. Around 400+ employees and their…
Tessolve participated at the 2019 GSA European Summit organized by the Global Semiconductor Alliance. David Mudard and Sean Moynagh represented Tessolve at the event. Their exhibit showcased our capabilities in…
Tessolve launched its VLSI Design Center in Bangalore, on January 31st, 2019. The new office, located on the Outer Ring Road is a setup focused on multi-layer designs of Integrated…
The verification of processor architectures designed for Machine Learning (ML) applications represent a departure from conventional techniques. Conventional constrained random testbenches, which focus on stimulus driving coverage, cannot scale for many ML algorithm realizations. ML architectures involve neural networks of processors that “learn” by manipulating coefficients across the network to match ideal outputs to a large quantity of input data. Furthermore, smart compiler technology is employed to leverage the many paths available in the network. An effective verification strategy can leverage planning algorithms that start with the desired output and optimize input values to achieve that output. Ensuring the paths that the compiler might trigger have all been tested, and that the test content can scale from individual processors to the entire network are critical challenges. Breker will share various approaches to this problem, developed through cooperation with three noted AI processor providers.
3 Key Points:
Current verification methodologies cannot scale to meet ML processor challenges
ML verification approach: consider desired outputs, optimize inputs to match
Test Suite Synthesis enable planning algorithm approach to target ML requirements
An Emulation Strategy for Artificial Intelligence Designs
The emergence of Artificial Intelligence is the “next big thing” and presents a unique opportunity for disruptive semiconductor development. End applications could range from ADAS, to 3D facial recognition, to voice and image processing, or to intelligent search. The SoCs for AI applications whether targeted for training or inference will have their own unique characteristics, but present quite common verification challenges that we will present in this session.
Supporting designs as big as 15 billion gates, Mentor’s Veloce Strato has unique virtualization capabilities that enable highly accurate pre-silicon execution of AI benchmarking applications like MLPerf. The Veloce Power App enables analysis of peak and average. We will cover how Veloce Strato and its supporting solutions are the best tool to help address the verification challenges of SoCs targeted for AI applications.
Most AI chips and hardware accelerators that power machine learning (ML) and deep learning (DL) applications include floating-point units (FPUs). Algorithms used in neural networks are often based on operations that use multiplication and addition of floating-point values. FPUs are difficult to implement. The IEEE 754 standard defines many corner-case scenarios and non-ordinary values. Even a minor rounding mistake could accumulate over many iterations and produce a large error. An FPU formal verification app compliant with IEEE-754 provides an efficient and rigorous solutions to FPU functional verification
3 Key Points:
Floating-point unit (FPU) for AI chips
FPU Formal Verification App
Compliance with IEEE-754
Name: Mike Bartley
Designation: Senior Vice President – VLSI Design
Title: Introduction
Biography:
Mike Bartley has a PhD in Mathematics from Bristol University, an MSc in Software Engineering, an MBA from the Open University and over 25 years of experience in software testing and hardware verification. He has built and managed state-of-the-art test and verification teams in a number of companies who still use the methodologies he established. Since founding TVS in 2008 he has grown the company to over 100 employees worldwide. Dr Bartley is Chair of both the Bristol branch of the British Computer Society and the West of England Bristol Local Enterprise Partnership (LEP). He has had over 50 articles and presentations published on the subjects of hardware verification, software testing and outsourcing.