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Takes Wings At Tessolve

Careers

Why join Tessolve?

At Tessolve, we help individuals realize their full potential, fostering excellence with our wholesome working environment. To our employees, we bring exposure to latest technology, and an opportunity to explore the application of silicon engineering across a wide breadth of industries. It means, you have the chance to work with globally diverse customers on cutting edge engineering projects while growing with a top tier company that is a pioneer in hardware testing.

You are welcome to – Join the Tessolve family.

Join Us

If you are –

Work Benefits

Perks of being at Tessolve

  • Compressed work week
  • Transport assistance
  • Provision for lunch, coffee and tea on-site
  • Enrollment to Employee Provident Fund scheme
  • Medical insurance for employees and dependents
  • Gratuity scheme for employees working 5 years and beyond
  • Attractive monthly Earned Leave credits and accrual limits
  • Flexible work options for certain cases and situations
  • On-site gym, TT table, and so much more

The Tessolve Worklife

Not work but growth as it should be

Open Positions

We are ready for you. Are you too?

ATE Test Engineer – Advantest 93K and SmartRDI Programming

Experience: 3+ years

Education: BE / ME in Electronics and Communication

Location: Dallas – USA

Roles and Responsibilities:

  • Develop test programs (Java/C++) for digital devices on the 93k platform.
  • Test Program development, debug and resolving SmarTest SW issues.
  • Write scripts (perl/python) and tools to assist customers in improving their process quality and time to market.
  • Must have Semiconductor testing knowledge.
  • Should have very good experience in test development and debug.
  • Digital and PMIC experience with Smart RDI programming – a major plus.
  • Knowledge on Programming concepts and C/C++, Java language – preferred.
  • Strong communication & statistical analysis skills.

Skills Preferred:

  • Bachelor’s or Masters in Electronics or computer science.
  • Min 3 Years of Experience in Advantest 93K tester (should be familiar with SMT 7 & 8).
  • SmarTest 7 or 8 hands-on experience.
  • Proficient in 93k digital testing and vector debugging (shmoo, pin margin, timing debug).
  • Multiple years of experience on the 93k platform.
  • Smart RDI Programming.
  • Strong 93k DC testing experience.

Good to have skills:

Apply Now

Test Engineer - Bench Characterization and PMIC

Experience: 2 to 4 years

Education: BE / ME in ECE / EEE

No. Of Positions: 5

Job Description:

  • Proven experience in deriving test plan based on chip data sheet, test board HW design, test automation with min of 2 to 4 Years of Experience.
  • Proven experience in bench test & Characterization of Power Management (SMPS,LDO,Battery Chargers, Clocks,ADC) and Band gap Reference.
  • Strong Analog & Digital Domain Experience preferred.
  • Strong Electrical engineering fundamentals with ability to identify suitable test equipment & test methodology requirement to perform Post Si Validation and Characterization.
  • Experience in using / controlling basic lab equipments like Oscilloscopes, DMM, Spectrum analyzers, clock and timing sources, signal generators etc.
  • Exposure on Lab Automation tools (LabVIEW) / Python scripting languages – highly desirable.
  • Should be able to understand Processor based SOCs and ability to write SW macros to program SOC module.

Responsibilities:

  • Strong Understanding of SMPS,LDO,Battery Chargers, Clocks,ADC and Band gap Reference is Must.
  • Responsible for designing, developing, and implementing cost-effective methods of testing and troubleshooting systems and equipment.
  • Prepares test and diagnostic programs, designs test fixtures & carry out complete Electrical Characterization and Debug of the PMIC devices.
  • Closely work with Senior members in the team to achieve the goal of deliverable onsite.
  • The job involves device level debug and bring up, co-ordination with Equipment vendors, Lab Characterization of the device developed, Device programming / testing new device samples for customers etc.
  • To get involved in understanding new requirements from Design Team, participate in the Technical discussions and prepare test, debug and compliance reports as per customer requirement.

Good to have skills:

Apply Now

Sr. Software Engineer

Experience: 5 + years

Education: BE (CSE / IT) / MCA

Notice Period: 1 Month

Location: Bangalore

Experience:

  • 3+ years of ‘C++’ expertise in designing and developing solutions.
  • 1+ years of ‘C#’ expertise in designing and developing solutions.
  • 3+ years of ‘Digia Qt‘ expertise in designing and developing solutions.
  • Application Deployment – Visual Studio, Install Shield.
  • Prefer to have Cross Platform Compilation experience.
  • Should have ‘Windows Application’, ‘STL’ and ‘Windows DLL’ development experience.
  • Ability to design and develop independently follow development processes, reviews and integration to handle releases.
  • Strong ability to understand existing code and create quality code from design models/documents.
  • Good understanding of object oriented design and knowledge of product life cycle.
  • Experience with any ATE test systems highly desirable.
  • Should have prior experience in developing solution by managing couple of junior engineers working under you.

Responsibilities:

  • As a Senior Software Engineer – you will contribute to analysis, design & development of features, creation of work plans.
  • You must be able to understand the requirements, existing features, design and architect solutions with junior engineers with you.
  • You will have opportunity to learn and implement both existing and new technologies, especially Digia Qt and C++/C#..

Additional Skills:

  • Programming knowledge on Java, VBA, Python , MATLAB & Perl.
  • Experience in using Static Code Analysis tools.
  • ATE – Pattern Conversion tool development experience.
  • Digital logic basics.

Good to have skills:

Apply Now

Software Engineer

Experience: 1 + years

Education: BE (CSE / IT) / MCA

Notice Period: 1 Month

Location: Bangalore

Skills & Experience:

  • 1+ years of hands-on experience on ‘Digia Qt’.
  • 1+ years of hands-on experience on ‘C++’ or ‘C#’.
  • 3+ years of ‘Digia Qt‘ expertise in designing and developing solutions.
  • Ability to design and develop independently follow development processes, reviews and integration to handle releases.
  • Strong ability to understand existing code and create quality code from design models/documents.
  • Good understanding of object oriented design and knowledge of product life cycles.
  • Experience with any ATE test systems highly desirable.

Responsibilities:

  • As a Senior Software Engineer – you will contribute to analysis, design & development of features, creation of work plans.
  • You must be able to understand requirements, existing features, design and architect solutions.
  • You will have opportunity to learn and implement both existing and new technologies, especially Digia Qt and C++/C# on Windows platform.

Additional Skills:

  • Programming knowledge on VBA, Python, MATLAB & Perl.
  • ATE – Pattern Conversion tool development experience.
  • Digital logic basics.

Good to have skills:

Apply Now

Sr. System Design Engineer

Experience: 5 – 6 years

Education: BE / ME in Electronics

No. Of Positions: 3

Location: Bangalore

Job Description:

  • Experience in High Speed digital, Analog and mixed signal board design.
  • BE / ME, BTech / MTech in Electronics Engineering with good in academic results.
  • Components selection, Circuit Designs, Schematic capturing, Driving PCB Layout and reviews for placement/routing.
  • Good Hardware debugging and board bring up experience.
  • Knowledge of Signal integrity, power / thermal integrity, EMI handling.
  • Experience in complex FPGA and Processor/SOC based designs.
  • Experience in high speed interfaces such as DDR3/4, PCI/PCIe, HDMI/Display Port, SATA, USB interfaces etc.
  • Experience in VME/PXI/PXIe based modular HW development, preferable.
  • Experience in using DCDC converters and power management devices and power systems.
  • Working closely with RTL/FPGA design & Development Engineers.
  • Experience in handling RF based designs is highly desirable.
  • Knowledge of “C” and software flow.
  • Working closely with Test software/BSP/SW development Engineers.
  • Good communication skills and effective customer facing skills.
  • Customer co-ordinations for project execution.

Good to have skills:

Apply Now

Sr. Software Engineer - System Team

Experience: 5 – 7 years

No. Of Positions: 2

Location: Bangalore

Requirements:

  • Strong C / C++ programming skills and hands-on development experience using Linux/ VxWorks.
  • RTOS preferably VxWorks / Linux Kernel development with extensive experience in ARM/x86/PPC Architecture.
  • Device driver development, Driver adaption, porting, enhancing & fine tuning the Kernel.
  • Development knowledge on BSP is must.
  • Knowledge on Boot architecture U-Boot & GRUB.
  • Knowledge on Kernel debugging tools like JTAG/T32/GDB.
  • Familiar with every stage in SW Development cycle.
  • Should have good understanding on Multimedia components and codecs.
  • Good mentoring, Communication Skill and team build capabilities / Management.
  • Strong in communication and customer interaction with right attitude.

Qualifications:

  • Understand complete requirements from customer and translate them it into SW implementable modules for the HW / OS platforms.
  • Responsible for designing, developing, and implementing right embedded SW systems and track the SW Development schedule.
  • To co-ordinate with Program Managers / Customers on-site and participate in discussions related to new projects.
  • The job involves device level debug and bring up in co-ordination with Cross functional Teams.

Good to have skills:

Apply Now

Sr Software Engineer - IoT Software-UI and Mobile Apps

Experience: 3+ years

Notice Period: Immediate/30 days

Location: Bangalore

Qualifications:

  • Bachelor/Master’s degree in Computer Science/Electronics or equivalent.
  • 3+ years Experience building UI for IoT devices applications.
  • Worked in an Agile environment.
  • Excellent coding skills in Javascript.
  • Good understanding of frameworks like Angular or React.
  • Past experience of data integration with Charts and Maps open javascript based frameworks.
  • Good experience in Software development practices and version control.
  • Experience with Android/iOS apps will be highly preferred.
  • Good communication skills enjoys interacting with customers, good team player and self-driven.

Mandatory Skills:

  • Experience in any of UI framework like Angular or React JS.
  • Hands-on in Javascript.
  • Hands-On in Mobile Apps Andriod or iOS.
  • Experience in Charts libraries.

Good to have skills:

  • Direct IoT application development experience.
Apply Now

Manager / Lead Test Engineer

Qualification: BE/ME in ECE/EEE

Experience: 6 to 10 Years

No of Position: 1

Location: Bangalore

Requirements:

  • Candidate should have minimum 6 to 10 years experience in semi-conductor testing
  • Responsible for working with different teams for understanding the device datasheet and come up with a detailed Test procedure/plan to test the chip in ATE environment
  • Need to interact with the PCB design team for developing the necessary hardware – Test load board, bench board and probe cards
  • Should be responsible for developing the complete ATE test program to validate the chip
  • Should invlove in developing the test methodologies as required

Responsibilities:

  • Work with design/DFT team to develop the detailed test procedure from device data sheet
  • Design and develop the required test hardware- Load board, bench board, Qualification board and probe card
  • Develop the ATE test program for device debug
  • First silicon verification and device bring up using ATE tools and bench equipment
  • Device characterization across temperature, voltage and process corners and validate the chip against the specification
  • Responsible for releasing  the Final production quality test program to the customer (both wafer final test program)
  • Interactions with the Design/DFT team through out the project execution
  • Interact with the customer on a daily basis and provide status update through e-mails and conference calls.
  • Experience in test program release procedure at production test house
  • Responsible from the beginning to the Final test/Wafer Test program release at customer site
Apply Now

Layout Design Engineer

Qualification: BE/ME in ECE/EEE

Experience: 3+ Years

Requirements:

  • Substrate layout design, cadence tools
  • PCB routing,Library creation, RDL routing, simulations
  • Substrate material knowledge is added advantage

Responsibilities:

Apply Now

Test Engineer (Post Silicon Validation And Characterization)

Qualification: BE/ME/B.Tech/M.Tech in EEE/ECE/EI/CS

Experience: 3 Yrs of exp in Silicon Validation/3 Yrs design exp in Electronics HW

No of Position: 1

Job Description:

  • A candidate with min 3 Years of Experience in Silicon validation and Characterization (OR) min of 3 Yrs design experience in Electronics HW industry with motivation to take up career as Characterization Engineer
  • Strong Electrical engineering fundamentals and exposure on complete HW Development cycle – an added advantage Proven experience in understanding the Device Data Sheet and derive the test methodology based on the Test plan provided Hands-on experience in one or more of the following – highly desirable industry standard Hi-Speed interfaces such as DDR-2, DDR-3, SATA, USB 2.0, USB 3.0, Display Port, PCI-e
  • Proficiency with measurements and related Lab Equipments – is must
  • Exposure on FPGA Design tools such as Xilinx / Altera – a major plus
  • Knowledge on Programming concepts and ‘C’ language – preferred
  • Strong communication skill

Responsibilities:

  • Prepares test and diagnostic programs, designs test fixtures to perform the System Testing & delivery, developing and implementing test automation sequence
  • The job involves device level debug and bring up, co-ordination with team lead to meet the deliverable, Lab Characterization of the Device developed, Device programming/testing new device samples for customers, board debugging etc.
Apply Now

Verification Engineer/Sr.Engineer/Lead

Qualification: BE/ME/B.Tech/M.Tech in EEE/ECE/EI

Experience: 3 – 12 years

No of Position: 20

Job Description:

  • 3+ Years of experience on Subsystem/IP verification on multimillion Gate and complex Design with multiple clocks and power domains
  • Testbench and Testplan development
  • Understanding of the design issues in the RTL Experience and working knowledge of HVLs (SV UVM/C/C++), HDLs (Verilog), PLI/DPI, simulators (Questa/VCS) is a MUST
  • Experience in DDRSS, protocols like AHB/AMBA,AXI, ACE and memory controllers
  • Exposure to formal verification methodology, assertions/SVA, functional coverage, gate level simulations, verification planner and regression management

Responsibilities:

Apply Now

RTL SOC Implementation (Senior Level): REQ ID - RTL1

Qualification: BE/ME/B.Tech/M.Tech in EEE/ECE/EI/CS

Experience: 5 – 10 years

No of Position: 1

Job Description:

  • SoC RTL Integration/LEC/Synthesis/Static Timing Analysis.
  • Tools: Synopsys DC Compiler, Primetime/ Signal Integrity.

Responsibilities:

Apply Now

DFT Engineer/Sr.Engineer/Lead

Qualification: BE/ME/B.Tech/M.Tech in EEE/ECE/EI

Experience: 3 – 12 years

No of Position: 18

Job Description:

  • Should have sound understanding of all the design for test requirements
  • Should be able to comprehend DFT architecture, architecture limitations, schedule, volume of the task(s)
  • Aware of all the aspects relating to Scan/ATPG
  • Scan synthesis, coverage metrics by fault-models – stuck-at, delay & Bridging
  • Memory bist
  • Test power estimation, Bounday scan, IDDQ, IO testing, Mixed-signal IP testing, Analog IP testing
  • Post-Silicon debug and support
  • Knowledge of test STA
  • Debug skills and Automation savvy
  • Good understanding of Gate-Level simulations and its nuances
  • Translate tool generated patterns to ATE platform
  • Be able to help in silicon debug both on ATE and at system level

Responsibilities:

Apply Now

Physical Design Engineer/Sr.Engineer/Lead

Qualification: BE/ME/B.Tech/M.Tech in EEE/ECE/EI

Experience: 3 – 12 years

No of Position: 20

Job Description:

  • Candidate should have 3 to 12 years of complete experience in implementation form Netlist to GDS-II
  • Having hands on Synopsys and Cadence tools is an added advantage
  • Candidate should handle PNR implementation independently for medium complex Hard macros with instance count from 500K to 1M
  • Should handle the timing closure independently for the hard macros
  • Should have worked on PTSI closure
  • Should able to handle FV, CLP, PDN & PV sign off checks for hard macros

Responsibilities:

Apply Now

IP/SoC Logic Design Engineer

Qualification: BE/ME/B.Tech/M.Tech in EEE/ECE/EI/CS

Experience: 5 – 15 years

No of Position: 3

NOTE: This is for ONSITE to US and Valid H1B VISA is Mandatory

Job Description:

  • Performs logic design, Register Transfer Level RTL coding, and simulation to generate cell libraries, functional units, and subsystems for inclusion in full chip designs
  • Participates in the development of Architecture and Microarchitecture specifications for the Logic components
  • Evaluates new feature requests, Designs and develops IP features
  • Provides IP integration support to SoC customers and represents RTL team
  • Collaborating with cross discipline stake holders in defining micro-architecture, implementing RTL in System Verilog and integrating other IPs into the design

Responsibilities:

Apply Now

Analog Designers/Verification/Layout Engineers: REQ ID - ANLG1

Qualification: BE/ME/B.Tech/M.Tech in EEE/ECE/EI/CS

Experience: 5 – 10 years

No of Position: 1

Job Description:

    • Specification study, Verification Plan Development for Analog/Mixed Signal blocks
    • Block Modelling and Verification in Verilog-AMS
    • Chip Top level Functional Simulation
    • Sign-off against Checklist before Tape Out release

Desired Skills & Experience:

  • Prior Analog Verification Experience up to 4 Years
  • Analog Circuit Design knowledge and/or experience
  • Experience in testing of MIPI RF Front End Switches is mandatory.
  • Analog Circuit Design knowledge and/or experience
  • Experience in using Cadence Schematic Editor, ADE in a hands-on manner
  • Mixed Signal Verification
  • Good communication skills
  • Analog Mixed-Signal layout and verification for different complex analog circuits in 45nm node or lesser.Knowledge of half cell Tool Experience like Cadence Virtuso ,Vxl and Virtuoso, Schematic Composer, verifications tools including Assura, Mentor/Synopsys Calibre /Hercules LVS, DRC, STarRC for extraction
Apply Now

Junior Engineer - Engineering Documentation & Component Engineering

Qualification: Diploma in Electronics / Technicians who have 6 years experience in SMT

Experience: 3 – 4 years

Job Description:

    • Verify BOM’s received from internal Engineering Department / External customers
    • BOM release for procurement / Assembly
    • Alternate parts suggestion
    • Co-ordination with assembly & QC teams
    • Ensure proper documentation in place

Desired Skills & Experience:

Apply Now

Failure Analysis Engineer

Qualification: Diploma / BE in ECE / EEE

Experience: 2 years in electronics field in Area of IQC & stock room

No. of Positions: 2

Job Description:

    • Should have good knowledge in basic electronics
    • Diploma/BE in electronics ( 1-2 years experienced)
    • Should be able to troubleshoot complex board
    • Should work with PCB designers to design HTOL / ESD interface boards
    • Should work in shift

Desired Skills & Experience:

Apply Now