Skip to main content

System Level Test in the era of Heterogeneous Integration

Conference: Test Club | Test Club : Latest Silicon Test Strategies and Techniques
Speaker: Yogan Senthilkumar, Tessolve Semiconductor
Speaker Title: System Level Test in the era of Heterogeneous Integration

In the ever-changing landscape of the Semiconductor Test, System-level testing (SLT) has emerged to be one of the most prominent methodologies for production testing. Testing the device in Automatic Test Equipment (ATE) environment that focus for Structural and fragmented Functional test are in terms seconds and limited parallelism as the ATE Cost and Configurations do not favour long test time as it affects the Cost of Test.

SLT motive is to test the System / Device more close to real-use-case environment. In a real application for example GPU/ CPU /Microcontroller used for automotive, the device needs to be tested along with the other supportive ICs such as PMIC, Memory, Display, other power electronic under customer-specific firmware and OS. It is important to mention that the support ICs mentioned may not be from the same manufacturer. Testing the device on SLT environment may help to capture defects that may not be covered in ATE. These may support to test field returns and identify the gaps to improve coverage.

While the product development cycle is shrinking by moving from Monolithic to Heterogeneous integration such as Chiplets and HBMs ,which could be from a third party vendor .. the need to System Level test is of priority.

Key Points:

  • Testing for customer-specific Use Case is becoming a key need for the devices that are used for mission-critical applications.
  • New skills required to develop SLT solutions.
  • New Test Flow.
Speaker Biography:

Yogan - Vice president, Engineering He has 30 over years of experience in the field of Semiconductor Test. He is currently the Vice President Engineering based out of Tessolve Bangalore. He is with Tessolve from 2004. He has taken several roles that include Test engineering ,R&D, H.W division.

Before joining Tessolve, Yogan was with Teradyne Asia Test Application Group, handling Test Engineering projects from Teradyne US and Europe. Yogan's earlier years were with Salland Engineering, National Semiconductor and SPEL . He has presented papers on Test technique at various conferences including the TUG, Semicon and written articles in Test and Measurement World and Semiconductor Manufacturing.


Test Club is made possible through the generosity of our partner.

Close Menu