Skip to main content

Improving Verification: Designers and Verification

DVClub Europe Meeting – November 2019

Event at a Glance

Tuesday 26th November, 2019

11:30 – 14:00 BST

FREE to attend In-Person or Online

Join DVClub Europe

To receive updates on future meetings please subscribe to the DVClub Newsletter.

Improving Verification: Designers and Verification

How can designers and verification engineers collaborate to take a more whole view of the verification performed on a project and thus improve both the effectiveness and efficiency of that work.

dvclub logo

Agenda (BST):

Time Session Description           Slides              Videos
11.30 BST Arrival and Networking
12.00 BST Welcome and Introduction

Mike Bartley, Senior Vice President – VLSI Design, Tessolve

12.05 BST On the Origin of Bugs

Bryan Dickman, Independent Consultant, Valytic Consulting Limited



12.25 BST UVM for IP Designers—Moving Toward “Killing two birds with one stone

Dave Burgoon, Principal Design Verification Engineer, Microsoft Corporation



12.45 BST Why Reset Domain Crossing Verification is an Emerging Requirement to Accelerate Design-to-revenue

Abdelouahab Ayari, Application Engineer, Mentor: A Siemens Business




13.05 BST Formal Verification for Designers

Sergio Marchese, Technical Marketing Manager, OneSpin Solutions




13.25 BST Close and Networking

About DVClub

The principal goal of each DVCLUB meeting is to have fun while helping build the European verification community through regular educational and networking events. Attendance at DVClub Europe meetings is free and is open to all non-service provider semiconductor professionals. Each meeting addresses a specific issue faced by the design and verification community and whatever your speciality provides an excellent opportunity for updating knowledge as well as share experiences, insights and issues with other members of the verification community.


DVCLUB Europe is made possible through the generosity of our sponsors.

Close Menu