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Cache Coherency Verification

DVClub Europe Meeting –Sep 2023

Event at a Glance

Tuesday 5th September , 2023

12:00 – 13:00 BST

FREE to attend Online

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Cache Coherency Verification

SoC cache coherency verification is one of the most complex challenges faced by verification engineers. And the introduction of the embedded L3 cache and the increasing number of cores in CPU clusters ais making it even more challenging. In this DVClub we will focus on how this challenge can be best approached and some automation added.

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Agenda (BST):

Time Session Description Slides Videos
12.00 BST

Welcome and Introduction

Mike Bartley,Tessolve

12.00 BST

Enter the kaleidoscope: The diversity of coherency stimulus and coverage.

David Kelf, Breker Verification Systems

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12.20 BST

Assertion IP for Cache Coherency Verification

Alex Netterville, Synopsys

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12.40 BST

Stress Testing Coherent Systems

Nick Heaton, Cadence

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13.00 BST


About DVClub

The principal goal of each DVCLUB meeting is to have fun while helping build the European verification community through regular educational and networking events. Attendance at DVClub Europe meetings is free and is open to all non-service provider semiconductor professionals. Each meeting addresses a specific issue faced by the design and verification community and whatever your speciality provides an excellent opportunity for updating knowledge as well as share experiences, insights and issues with other members of the verification community.


DVCLUB Europe is made possible through the generosity of our sponsors.

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