|Conference:||DVCLUB Europe | Cache Coherency Verification|
|Speaker:||Nick Heaton, Cadence|
|Speaker Title:||Stress Testing Coherent Systems
Just functionally testing coherent systems is not sufficient to have confidence for silicon sign-off. This presentation will explore extensive new stress capabilities that are needed.
Nick is a long time Cadence Verification RnD leader who has worked in SoC Verification for more than 20 years. He is currently the Architect and RnD Leader for Cadence’s SoC Verification Products.
DVCLUB Europe is made possible through the generosity of our sponsors.