Verification Futures UK 2026, co-located with Semiconductors Futures 2026 organised by Tessolve and co-organised this year with Alpinum. The conference continues its strong tradition of delivering a unique blend of conference presentations, exhibitions, training, and industry networking sessions focused on the challenges faced in hardware and software verification. The event remains an important forum for end-users to define their verification challenges and collaborate with engineers, researchers, and vendors to shape practical solutions. In 2026, Verification Futures continues to strengthen its core emphasis on verification methodologies, DV tools, and engineering workflows, including areas such as formal methods for complex SoCs, CPU & RISC-V verification, open-source and licence-free verification tools, AI in design verification (AI in DV), verification planning and coverage, and HW/SW co-verification.
Semiconductors Futures 2026 brings together the semiconductor community, covering AI/ML in IP & SoC design, AI’s impact on EDA and workflows, FPGA & mixed-signal, with a focus on the automotive, data centre, and AI products. New tracks consider emerging technologies such as quantum computing, photonics, and chiplets, as well as startups and investments. We expect 50+ engineering students to attend a separate session.
Event at a Glance
Tuesday, 23 June 2026 – Full day conference, exhibition and networking event
Reading (UK) & online
FREE to attend conference In-Person or Online
Conference Program
| 08:30 | Exhibition open and student posters available for viewing | |||||||
| 09:25 | Conference starts | |||||||
| 09:30 | Conference Keynote – Nigel Toon, Blank Page Capital | |||||||
| 10:00 | Platinum Sponsor TBD | |||||||
| 10:30 | Break - Exhibition Open and Networking | |||||||
| 11:00 | Verification Futures | Semicon Futures | ||||||
| Main Morning | Verification Projects using Open Source/License-Free Tools | Sponsor Track | UKESF | AI Design IP | FPGA Topic #1 | Startups & Investment | ||
| 11:00 | ||||||||
| 11:30 | ||||||||
| 11:50 | ||||||||
| 12:10 | Doug Carson, Keysight Technologies | |||||||
| 12:30 | Lunch - Exhibition Open and Networking | |||||||
| 13:30 | Verification Futures | Semicon Futures | ||||||
| Afternoon Verification Session | Mixed Signal | UKESF | Design | FPGA Topic #2 | Startups & Investment | |||
| 13:30 | ||||||||
| 14:00 | Tessolve | |||||||
| 14:20 | ||||||||
| 14:40 | ||||||||
| 15:00 | Break - Exhibition open and Networking | |||||||
| 15:30 | Afternoon Verification Session | Semicon Futures | ||||||
| Main Afternoon | CPU/RISCV Verification | AI in DV | Mixed Signal | UKESF | Breakthrough Technologies | FPGA Topic #3 | Startups & Investment | |
| 15:30 | Design and Verification of an AI Accelerator in Neuromorphic Chips Abhyarthana Bisoyi - Odisha University of Technology and Research |
Tessolve | ||||||
| 15:50 | ||||||||
| 16:10 | ||||||||
| 16:30 | Drinks and Pizza, sponsor gift, raffle draw | |||||||
| 17:00 | End of conference | |||||||
Sponsors
If you would like to become a VF2026 sponsor please Contact Us.
