Efficiency Improvement and Automation in Design Verification using AI

AI is transforming Design Verification (DV) by automating workflows, improving coverage, and reducing cycle times. Tessolve’s AI Center of Excellence (CoE) is driving this shift with AI-powered solutions for testbench automation, assertion generation, constraint optimization, upskilling the engineers and functional safety compliance. This talk will highlight key CoE initiatives, including the UVM TB Generator, Spec Extraction Tool, UVM Reviewer, AI-Assisted Debugging, and RAG-based knowledge retrieval. We will explore how AI is enhancing efficiency, accuracy, and scalability in verification processes across industries. Join us to discover how AI is shaping the future of semiconductor verification and how these innovations can streamline your DV workflows.

Marmik Soni is a seasoned semiconductor professional with over 15 years of experience, currently serving as the Technical Manager at Tessolve's Center of Excellence (CoE). In this role, he leads the development of AI and Machine Learning solutions across various business units, including VLSI and Embedded Systems. Marmik is recognized for his expertise in Generative AI strategies and AI solution architecture, particularly in the semiconductor domain and organizational flows for the productivity and timeline improvements. His contributions have been instrumental in advancing Tessolve's AI initiatives, notably in areas like UVM testbench automation, assertion generation, and coverage closure. His efforts have led to the development of over 25 AI-driven tools, enhancing efficiency and innovation within the company. Beyond his technical achievements, Marmik is an active contributor to the industry, having delivered numerous presentations on AI integration. His work continues to influence the future of semiconductor design and verification through AI advancements.