Designing reusable, portable and secure IP for FPGA designs

FPGA and ASIC designs are increasing in complexity, relying on IP from multiple vendors. Without a structured approach, portability, security, and efficiency become challenges. This session covers IP-XACT (IEEE 1685) and its role in simplifying IP reuse, along with encryption standards (IEEE 1735 v2) that protect commercial IP while introducing debugging constraints. We’ll explore how modern EDA tools help navigate these trade-offs.

A case study will examine how STFC RAL developed a high-throughput FPGA-based scientific system using AMD FPGAs, Alpha-Data hardware, and Chevin Technology’s 100Gbps UDP Offload Engine. It will also highlight how Security by Design ensures hardware-based authentication and authorization are integral to the IP design process. We’ll demonstrate how embedding protective circuitry within the RTL using IP like ChevinID strengthens system resilience against cybersecurity threats. For engineers working on large, collaborative FPGA projects, this talk offers practical methods to improve development efficiency, reduce risk, and enhance security.

Steinn Gustafsson is the founder of Chevin Technology, a leading IP developer of accelerated security and data protocols and compute engines for defence, aerospace, and scientific markets. With over 25 years of expertise in FPGA technology, he has pioneered solutions for communication systems, ASIC design, signal processing, and digital security, earning multiple patents. Steinn leads a team of skilled engineers, fostering innovation and collaboration to deliver secure, high-performance, low-latency solutions. Passionate about both technical excellence and personal growth, he builds strategic partnerships that drive mutual success in tackling complex industry challenges