Conference: | Verification Futures 2025 (click here to see full programme) |
Speaker: | Daniel Cross, Tim Pylant |
Presentation Title: | A Real Number Model of a Phased Array Antenna |
Abstract: | Phase-array antennas appear in systems for many applications, including the following:
Often, these systems include large digital and software components, which can best be verified if the behavior of the antenna is included in the test cases. This RAK presents a real valued model of a phased array antenna that could be suitable for inclusion in digital/software test cases for rapid system verification. Basic operation of a phased array antenna is reviewed. SystemVerilog code to realize the model and its test environment is covered in detail. Finally, simulation results are presented. |
Speaker Bio: | Daniel Cross holds MSECE and BSEE degrees from the University of Miami. He has been applying behavioral modeling and mixed signal simulation to verification problems for over 15 years, achieving first pass success with RF ASICs and SOCs. He joined Cadence in 2019 and has championed the adoption of Real Modeling and advanced verification methodologies to mixed signal designs. He is a Senior Member of the IEEE and participates in several IEEE standards working groups. Tim Pylant has worked at Cadence for over 32 years in several roles. He started as an Application Engineer supporting Verilog and Virtuoso (System Workbench) and continued adding product knowledge for products such as Skill, Verilog netlister, and EDIF. In 1996, the Core Competency group was created to focus on new product rollout with customers worldwide. He joined that group to support the rollout of NC-Verilog and later Cobra cycle simulator. After a few years in that role, he assumed the group's management, including the addition of formal verification, testbench automation (SystemC/eRM/URM/OVM/UVM), and analog simulation. It was during this time that he began his interest in mixed-signal simulation. When the Core Comp organization was reorganized, he returned to the field as an Application Engineer supporting verification. Still, he continued focusing on mixed-signal accounts and eventually identified a need to focus on engaging with mixed-signal verification customers. He led the Mixed-Signal Solution group, engaging with customers to provide advanced methodologies for verifying mixed-signal designs and serves as Vice-Chair of the Accellera UVM-AMS Working Group. He has received two patents in the area of circuit design automation. Before Cadence, Tim received his degree in Electronic Engineering Technology from Texas A&M University in 1984 and an MBA from the University of Houston in 1992. His former jobs were F-16 avionics design at General Dynamics in Fort Worth (1984-1988) and ASIC design at Compaq Computer in Houston (1988-1992). He has participated in TexasWISE, Capstone, ECE EDAC, and ETID EAC at Texas A&M to provide an industry perspective from the EDA side of the business. Tim enjoys working on and showing his 1970 Cutlass convertible, wood- and metal-working. He is actively involved in his church’s disaster relief unit and is president of the Fayette Co A&M Club. |
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