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Validation of Hybrid Architectures

Conference: Verification Futures 2023 (click here to see full programme)
Speaker: Suneil Mohan
Presentation Title: Validation of Hybrid Architectures


Speaker Bio:

Dr. Suneil Mohan received his BE from Anna University in India in 2006 and PhD from Texas A&M University in 2012. He is a senior validation engineer in the Intel E-core team with deep expertise in both Emulation and Post silicon validation. He is currently the Post Silicon debug lead for the E-core team. He has worked on multiple generations of the E-core product line including those that are part of the most recent 13th Generation Intel® Core™ processors. In addition, he has experience working on the ISO26262 standard.

Key Points: TBD
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