|Conference:||DVCLUB Europe | Selection of 2021 DVCon/DAC Verification Papers|
|Speaker:||David Kelf, CEO, Breker Verification Systems.|
|Abstract:||SoC Verification has become more important in recent years. However, this task is challenging given the increased complexity of UVM for larger systems, emulation usage and the need to drive processors as part of the system. This tutorial will provide a method using a virtual realization layer, known as the Synthesizable VerificationOS, which can perform various OS-like capabilities while streamlining hardware verification tool usage. It may also be used to aid firmware verification with the hardware. This presentation was first delivered as a workshop at DVCon US 2021, which features Mike Chin, Principal Engineer at Intel. The full workshop may be found at brekersystems.com/soc-verification-and-the-synthesizable-verificationos-workshop/.
3 Key Points:
|Speaker Biography:||Dave Kelf, is the Chief Executive Officer at Breker Verification Systems and has been with the company four years. Previous to Breker, Dave most recently served as vice president of worldwide marketing solutions at formal verification provider OneSpin Solutions. Earlier, Kelf was president and CEO of Sigmatix, Inc. He worked in sales and marketing at Cadence Design Systems, and was responsible for the Verilog and VHDL verification product lines. As vice president of marketing at Co-Design Automation and then Synopsys, Kelf oversaw the successful introduction and growth of the SystemVerilog language, before running marketing for Novas Software, noted for the Verdi product line, which became Springsoft and is now part of Synopsys.
Dave holds a Bachelor of Science degree in Electronic Computer Systems from the University of Salford and a Master of Science degree in Microelectronics from Brunel University, both in the U.K., and an MBA from Boston University.
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