|Conference:||DVCLUB Europe | Selection of 2021 DVCon/DAC Verification Papers|
|Speaker:||Nick Heaton, Distinguished Engineer, Cadence Design Systems.|
|Abstract:||Key industry SoC DV leaders from Qualcomm, Intel and Cadence discussed the key challenges facing SoC Verification teams.
3 Key Points:
|Speaker Biography:||Nick Heaton is an ASIC and EDA veteran with more than 30 years of experience in the design and verification of complex SoCs. Nick graduated from Brunel University, London in 1983 with First Class Honors in Engineering and Management Systems. Nick joined Cadence 15 years ago and is a Distinguished Engineer and SoC Verification Architect responsible for the new SystemVIP Product line.|
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