|Conference:||DVCLUB Europe | Formal Verification|
|Speaker:||Nicolae Tusinschi, Product Specialist Design Verification. OneSpin Solutions|
Verification of floating-point hardware designs has long been considered a significant challenge for formal tools. Floating-point units (FPUs) combine the mathematical complexity of floating-point arithmetic with a wide range of special cases that require complex control paths. Most successful applications of formal verification to FPUs have involved domain experts and hard-to-use specialized tools. In contrast, this talk presents a customer case study in which a real-world floating-point design was verified using commercial formal tools and a readable, easy-to-use SystemVerilog assertion-based verification library for the IEEE 754 standard. The talk includes examples of assertions, bugs found, and runtimes on the customer design.
|Speaker Biography:||Nicolae Tusinschi is Product Specialist Design Verification at OneSpin Solutions. Nicolae joined the team in 2016 as a quality assurance engineer and developed an exhaustive knowledge of OneSpin’s complete suite of formal verification tools before targeting his attention on the company’s OneSpin 360 DV™ design verification solution. His key projects have included integrating simulation coverage with formal results, leveraging coverage results in the verification process, and a case study on the application of formal verification to the I2C serial protocol.
Nicolae holds a Bachelor of Science in Industrial Automation from “Dunărea de Jos” University of Galați (Romania) and a European Master’s in Embedded Computing Systems (EMECS) awarded jointly by Technische Universität Kaiserslautern (Germany) and University of Southampton (United Kingdom). During his graduate studies, he completed his master’s thesis, “Formal Verification of Proprietary Microcontroller IP,” at Continental in Frankfurt, Germany.Nicolae is based at OneSpin headquarters in Munich, Germany and is proficient in English, Romanian, Russian, and German
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