We’re delighted to invite you to present at Verification Futures UK 2026, co‑located with Semiconductors Futures 2026, taking place on Tuesday, 23 June 2026 at the University of Reading.
Organised by Tessolve and Alpinum, both events continue to grow in scope and impact.
📅 Call for In‑Person Presentations
📍 Date: 23 June 2026
📍 Location: University of Reading, UK & Online
🔷 Verification Futures (VF UK 2026)
Verification methodologies, DV tools & engineering workflows
We welcome in‑person presentations on topics including:
- Formal methods for complex SoCs
- CPU & RISC‑V verification
- Open‑source & license‑free verification tools
- AI in design verification (AI in DV)
🔶 Semiconductors Futures 2026
Design, semiconductor technology, AI workflows & next‑gen ecosystems
We invite in‑person presentation proposals across:
- AI/ML in IP & SoC design
- AI’s impact on EDA and chip design workflows
- Semiconductor manufacturing & supply‑chain evolution
- Automotive electronics, data‑centre scale systems & AI platforms
- Quantum computing, photonics & emerging technologies
- FPGA & mixed‑signal engineering / breakthrough technologies
- Startups, innovation, investment & ecosystem perspectives
- UKESF engineering & academic insights
📧 How to Submit Your Presentation
If you’d like to present a paper, please contact us at vfutures@tessolve.com
Our team will review and get back to you with next steps.
🌟 Why Present?
- Reconnect with a highly engaged engineering and semiconductor community
- Share real-world insight, not just theory
- Gain visibility across two complementary, co-located events
- Support and engage with the next generation of engineers through UKESF
⏳ Early‑Bird Reminder: Register Free Before Late March
Registration is free today but moves to paid attendance in late March.
👉 Secure your free seat and submit your talk early for priority consideration.
If you’d like feedback on your topic idea or wish to discuss your proposal, simply reply or write to vfutures@tessolve.com
