AI Agents in Production With Chip Teams: Opportunities, Challenges, and Lessons Learned

Conference: Verification Futures 2026 (click here to see full programme)
Speaker: Kartik Hegde
Presentation Title: AI Agents in Production With Chip Teams: Opportunities, Challenges, and Lessons Learned
Abstract:

The growing complexity and specialization of modern chips necessitate a fundamental shift in how we approach design and verification. Large Language Models (LLMs) present a timely and transformative opportunity to address key bottlenecks in chip design flows. This talk will explore how the advanced natural language processing capabilities of LLMs can streamline design and verification processes, from automated verification plan generation to intelligent debug assistance—supported by real-world case studies. We will share insights from fine-tuning LLMs for DV-specific tasks, demonstrating measurable improvements in accuracy of LLMs on real-world examples. Beyond the opportunities, we will discuss the challenges of deploying generative AI solutions in production chip design teams, including infrastructure constraints, reliability concerns, and building user trust. By integrating generative AI with modern methodologies and software stacks, this talk will outline how LLMs can accelerate chip design cycles and significantly reduce time to market for next-generation chips.

Speaker Bio:

Kartik Hegde currently serves as the Senior Group Director of Agentic AI and ChipStack at Cadence Design Systems. He joined Cadence following the acquisition of ChipStack, an AI-driven chip design startup he co-founded and led as CEO. He holds a Ph.D. in Computer Science from UIUC and specializes in building efficient AI models, designing domain-specific, highly programmable hardware accelerators and agentic AI systems for electronic design automation (EDA).

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