Conference: | Verification Futures 2025 (click here to see full programme) |
Speaker: | Abhijit Madhu Kumar |
Presentation Title: | Modelling a 4-Level DCDC Converter Using EEnets |
Abstract: | There are many challenges associated with verifying analog circuits where high accuracy and high performance are required from the simulator. This talk presents a case for Digital Mixed-Signal (DMS) modelling, specifically EEnet models, as a tool to achieve these goals. The presentation also discusses advantages and challenges associated with this kind of verification. |
Speaker Bio: | Abhijit graduated from Georgia Tech in 2014 with an MS in Electrical Engineering. He joined Cadence in 2015 and works as a Solutions Engineer providing mixed signal verification solutions to several Cadence accounts wanting to adopt advanced methodologies. Abhijit’s work focuses on analog and real-number modelling, and the introduction of Metric-Driven Verification and UVM concepts to the verification of mixed signal systems. |
Key Points: |
|