||Verification Futures 2022 (click here to see full programme)
||Unleashing AI/ML for Faster Verification Closure
||Design verification is one of the most expensive and time-consuming activities undertaken in electronic system development. Advances in machine learning (ML) algorithms, software and practices in the last few years have given verification engineers a powerful suite of tools to attack this problem. We will discuss insights on various Synopsys offerings delivering impressive productivity gains.
||Olivier Schnitzler is established leader in EDA industry with 28 years of semiconductor and EDA experience. He holds MS degree in Microelectronics from Polytech Montpellier, France. He is currently leading Field applications engineering team in Europe for Synopsys. Olivier has been instrumental in leading transformation of several verification products In Synopsys with specialized focus on improving verification and debug productivity. Olivier leads several European accounts and ensures industry needs in verification space are well understood and addressed
||Machine Learning, Verification productivity, End to End solutions.