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Hardware-Software Co-Verification 101

Conference: Verification Futures 2022 (click here to see full programme)
Speaker: Vladislav Rumiantsev
Presentation Title: Hardware-Software Co-Verification 101
Abstract: Big portion of current Cirrus Logic portfolio has integrated CPU or DSP cores that add such features as audio enhancement, speaker protection and security. Hardware-software co-verification is key for these products as it allows us to catch bugs early and explore a wide range of system level tests before physical hardware is available. This presentation will walk you through the main steps of Hardware-Software Co-Verification process with examples of tools and test scenarios along the way.
Speaker Bio: Vladislav joined Cirrus Logic in the middle of the pandemic and began his verification journey as part of the Hardware-software co-verification team. This allowed him to utilise his embedded systems background and pursue his interest in the ASIC development cycle.
Key Points:
  • Verification of software on modelled hardware becomes more common due to expanding feature set of modern chips
  • Hardware-software co-verification allows discovery of software bugs early in the IC development cycle and improves overall verification coverage
  • As a Hardware-software co-verification engineer, you are exposed to full chip functionality to develop system level tests
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