Tessolve in collaboration with InCore Semiconductor brings to you an open-source RISC-V Core verification tool – RiVer Core

By June 24, 2021Blogs, Thought leadership

RiVer Core is a python based extensible and scalable framework aimed at providing a central control point for all major aspects of a RISC-V processor verification flow. The tool is fully open source under the permissive BSD-3 Clause License.
Read this blog to explore more about RiVer Core framework, the major components, its holistic approach and its advantages.

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