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Introduction to System Level test

Conference: Test Club | Test Club : Latest Silicon Test Strategies and Techniques
Speaker: Stuart Pearce, AEM
Speaker Title: Introduction to System Level test

We will share an overview of why system level test is important and an overview of test methods used to increase faults coverage with system level test.

Key Points:

  • System level test is required for mission critical applications being realized with the latest Silicon process nodes.
  • Due to test times massively parallel test solutions are required.
  • System test requires testing in the native application managing all system level aspects including closed loop power and thermal management.
Speaker Biography:

Stuart is responsible for field marketing and product management of AEM semiconductor test instrumentation and solutions bringing disruptive and differentiated solutions to the semiconductor test space. Focusing on application specific test solutions, intelligent system level test and burn-in for semiconductor and electronics companies serving high performance computing, 5G, Automotive and AI markets.

With over 30 years’ experience in the capital test equipment industry Stuart has extensive experience defining, developing, and bringing to market test solutions that align with industry and customer requirements.

Prior to joining AEM Stuart held various senior management rolls at Thinfilm ASA as VP of Product management, bringing to market roll to roll printed electronics, Formfactor product engineering of advanced wafer test solutions, Credence ATE product line responsibilities, and Schlumberger ATE engineering, marketing and product line responsibilities. Stuart started in the UK as an engineer developing function and in-circuit board testers before his expatriate relocation to San Jose California to architect next generation test solutions with Schlumberger.


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