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Effective Adoption of Formal Verification

Conference: DVCLUB Europe | Formal Verification
Speaker: Alexandre Esselin Botelho, Cadence Design Systems
Speaker Title: Effective Adoption of Formal Verification

Adoption of formal verification (FV) is growing quickly – about 16% CAGR over the last 5 years. Experienced FV engineers are in huge demand and can effectively apply FV techniques and leverage the technology efficiently on verification tasks. Given the current growth of FV, it is now required that more non-expert design and verification engineers can utilise the technology. This presentation intends to demonstrate the current trends in methodology and ease-of-adoption features recently introduced in Jasper.

Key Points:

  • Auto-formal
  • Design Bring Up
  • Bug hunting
Speaker Biography:

Gayatri Padhy is an esteemed speaker known for her profound insights techniques into formal verification development methods and AI/ML use in VLSI Design. With an experience in Verification background and Design studies, Gayatri brings a unique perspective to her presentations, blending all techniques.


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