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Accelerating Verification with a mix of Automation and AI

Conference: DVCLUB Europe | Auto-generation of Verification Infrastructure for IP to SoC
Speaker: Mike Bartley , Tessolve Semiconductor
Speaker Title: Accelerating Verification with a mix of Automation and AI

In this talk we report on new initiative within Tessolve to generate most of the infrastructure needed on a verification project with a target to reduce effort and turnaround time by 50%. Using a mix of generate AI and machine learning, combined with basic automation, this talk will report on progress to date and the lessons learned so far.

Key Points:

  • Accelerating verification through automation and AI.
  • How can Generative AI be used to generate our plans and some key test bench items.
  • Can AI help to generate key constraints for closure?
Speaker Biography:

Dr Mike Bartley has over 30 years of experience in software testing and hardware verification. He has built and managed state-of-the-art test and verification teams inside a number of companies (including STMicroelectronics, Infineon, Panasonic and start-up ClearSpeed) and also advised a number of companies on organisational verification strategies (ARM, NXP and multiple start-ups).

Mike successfully founded and grew a software test and hardware verification services company to 450+ engineers globally, delivering services and solutions to over 50+ clients in a wide range of technologies and industries. The company was acquired by Tessolve semiconductors, a global company with 3000+ employees supporting clients in VLSI, silicon test and qualification, PCB and embedded product development in multiple vertical industries.

Mike has a PhD in Mathematics (Bristol University), and 8 MSc’s in various subjects including management, software engineering, computer security robotics and AI. He is currently studying (remotely) for an MSc in Blockchain and Digital Currency at the University of Nicosia, Cypress


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