About the Speaker

Shivayogi V. Kerudi is currently an Assistant Director of Engineering for the Design Verification stream at Tessolve. He has mentored and managed large teams working on SoC verification for multiple Tier‑I customers. Prior to joining Tessolve, he worked with organizations including Sasken, Infineon, Intel, and Wipro, contributing extensively to Design Verification. His primary experience spans the automotive and mobile communications domains.

AI DV Flow methodology for Early Tape out

Overview

The System-on-Chip (SoC) domain stands at the convergence of electrical engineering, computer science, and semiconductor manufacturing, where rising design complexity and time-to-market pressures demand new paradigms. At the center of this transformation is AI—autonomous systems capable of reasoning, learning, and collaborating with human engineers.

This talk examines the integration of AI into functional verification, mapping current and emerging practices to AI-enabled capabilities. Moving beyond script-based automation, AI agents act as collaborators—accelerating debug, improving coverage closure, managing verification complexity, and driving continuous optimization. The session presents a practical framework and forward-looking vision for verification leaders, architects, and engineering managers.

Key Points

• Increasing functional complexity: Multi-domain, multi-core, high bandwidth
• Shrinking time-to-market: Competition and market evolution demand rapid iteration
• Extreme test coverage requirements: Functional correctness, safety, security, and standards compliance