Jerome Sauger

Senior Silicon Verification Engineer,
Axelera AI

About the Speaker

Jerome Sauger has been a Senior Verification Engineer at Axelera AI since March 2024. Prior to joining Axelera AI, Jerome spent several years as a Verification Engineer in the automotive industry, where he gained valuable experience applying verification methodologies to automotive semiconductor applications.
With a particular interest in new tools and methodologies, Jerome specializes in top-level verification where his extensive experience with emulators and in C test development allow him to shine.

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Speed up top-level simulations with QEMU

Overview

End-to-end testing of embedded systems in full emulation is costly, as booting an entire OS dominates simulation time. For tests targeting specific subsystems, a workaround is to reduce the size of the simulated design by abstracting away the master logic, retaining only the target subsystem under test. This targeted approach significantly reduces simulation overhead. We present a practical implementation leveraging QEMU interfaced with arbitrary simulators or emulators through multisim, an open-source DPI library. The resulting setup demonstrates significant performance gains while exercising the design’s logic as a regular full-scale end-to-end test would.

 

Key Points

  • End-to end tests requiring the OS to boot are costly to run in simulation due to the time they take
  • Abstracting away the master logic and only keeping the tested subsystem yields significant performance gains
  • Such a setup can be achieved with open-source blocks, e.g. QEMU and multisim.