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Deploying AI in DV for smarter and faster IP verification

Conference: Verification Futures 2025 (click here to see full programme)
Speaker: Arjumand Yaqoob
Presentation Title: Deploying AI in DV for smarter and faster IP verification
Abstract:

AI is set to play a key role in optimizing the traditional design verification flows and challenges. Providing a faster and smarter platform to deploy and use in design verification while verifying designs of different complexities. We will be presenting a case study based on our AI strategy model which can be deployed on a DUV (design under verification) to achieve the desired results.

Speaker Bio:

Arjumand Yaqoob is semiconductor professional with around 15 years of experience, currently working as Staff Engineer in Qualcomm Incorporated in it’s HQ at San Diego CA. In this role he is working on Complex design verification tasks and projects contributing to the cutting-edge technology developed and delivered by Qualcomm. He has worked across different business units and teams for last decade while working in Qualcomm and contributed to many critical tasks including process improvements, verification strategies and planning and developed complex verification architectures and Test Benches. He has been part of methodology development teams and helped in automating and flows development for verification reviews and signoff processes. In addition to technical tasks, Arjumand has worked actively in different technical committees in Qualcomm and helped in organizing technical talks and seminars.

Key Points:
  • AI models usage in Design Verification
  • AI Strategy and deployment to generate UVM TB and collaterals for design verification
  • Efficiency and Improvement
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