RISC-V: Innovating Within An Established Architecture

Explaining how a semiconductor core IP called VISC (Versatile Intrinsic Structured Computing) was created within the requirements both to be compatible with the standard RISC-V ISA and to innovate for differentiation. To do this it uses a compression and sequencing technology to enable entire algorithmic routines to be optimised for parallel execution. This can be used in chip from embedded microcontrollers to high-performance computing.

James Lewis is the CEO of AI chip startup, RED Semiconductor International Ltd. A University of London graduate in Electronic Engineering, James was the founder of Oxford Semiconductor and Redux, both companies innovating new semiconductor solutions to meet demanding market needs. He is adept at recognising customer-specific and market-generic needs, leading the development of chip solutions to meet those needs, and interacting with customers globally to win designs and close high-value orders. He has extensive semiconductor supply chain experience working with worldwide semiconductor manufacturers and is a member of the IoT Security Foundation and MIET (Member of the Institution of Engineering and Technology). James has experience of starting, building and exiting hi-tech companies both in the UK and USA, delivering great returns for early-stage investors.