Event at a Glance
Tuesday 28th June, 2022
12:00 – 13:10 BST
FREE to attend Online
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A dedicated 1 hour additional DVClub with a talk from Espen Tallaksen
|12.00 BST 16:30 IST||UVVM: UVM for VHDL designers – An introduction
Espen Tallaksen, EmLogic
The principal goal of each DVCLUB meeting is to have fun while helping build the European verification community through regular educational and networking events. Attendance at DVClub Europe meetings is free and is open to all non-service provider semiconductor professionals. Each meeting addresses a specific issue faced by the design and verification community and whatever your speciality provides an excellent opportunity for updating knowledge as well as share experiences, insights and issues with other members of the verification community.
DVCLUB Europe is made possible through the generosity of our sponsors.