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Frank Schirrmeister

Executive Director, Strategic Programs,
Synopsys

About the Speaker

Frank Schirrmeister is Executive Director, Strategic Programs, System Solutions in Synopsys’ Market and Products Group. He leads strategic activities across system software and hardware assisted development for industries like automotive, data center and 5G/6G communications, as well as for horizontals like Artificial Intelligence / Machine Learning. Prior to Synopsys, Frank held various senior leadership positions at Arteris, Cadence Design Systems, Imperas, Chipvision, and SICAN Microelectronics, focusing on product marketing and management, solutions, strategic ecosystem partner initiatives, and customer engagement. He holds an MSEE from the Technical University of Berlin and actively participates in cross-industry initiatives as Panel Chair of the Design Automation Conference.

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The Next Era of Hardware-Assisted Verification for AI Systems: Modular, Software-Defined, and Hybrid

Overview

The rapid rise of AI-driven systems is transforming both semiconductor design and verification. AI accelerators, chiplet-based architectures, and software-defined products are driving unprecedented verification complexity, while the hardware-         assisted verification (HAV) market requirements are bifurcating between large-scale data center AI workloads and software-centric edge, mobile, and physical AI applications. This presentation examines the shift toward modular HAV architectures that enable scalable capacity, IP-centric validation, and seamless progression from emulation to prototyping. It also explores AI-assisted workflows, hybrid verification, and low-power validation techniques that combine virtual platforms with RTL-accurate emulation to accelerate software development and expose system-level issues before silicon availability

Key Points

  • AI is driving a fundamental shift in verification requirements
  • The HAV market requirements are bifurcating, demanding more specialized infrastructures.
  • Modular, software-defined, and hybrid verification architectures are becoming essential.