Amit Edited 1

Amit Kumar

Principal Engineer,
Tenstorrent

About the Speaker

Amit Kumar is a Principal Engineer in RISC-V Design Verification at Tenstorrent, based in Austin, Texas. His work focuses on verifying high-performance RISC-V cores, with particular emphasis on memory-management units, functional coverage, and scalable verification infrastructure. He leads development of reusable verification frameworks that combine UVM, RiESCUE, and Whisper, and actively drives open-source collaboration and tool adoption, including Verilator. Amit also contributes to verification of non-coherent atomics, vector extensions, and functional-safety features. Passionate about rigorous, evidence-driven engineering, he enjoys turning complex verification challenges into practical methodologies that improve confidence, productivity, and adoption across the broader RISC-V engineering community and beyond.

From Test Generator to Golden Model: Open-Source RISC-V Design Verification Building Blocks

Overview

Every RISC-V DV team builds the same four layers around its RTL: stimulus, reference model, testbench environment and checking. Tenstorrent has open-sourced all four as separable, production-grade components: RiescueD/RiescueC/CTK for directed and compliance test generation, Whisper as a steppable golden model, rv_tester as a lockstep core testbench with platform models, and CoreArchCoverage for ISA coverage derived from the model. This talk walks the stack end to end, shows it running on CVA6 and OpenC910, then scopes the same four roles down to a unit-level MMU environment. Attendees leave knowing which piece to adapt first.

Key Points

  • The full DV stack is open source, not just a piece of it. Test generation (RiescueD/RiescueC/CTK), golden model (Whisper), core testbench (rv_tester) and ISA coverage (CoreArchCoverage) — production tooling from a shipping out-of-order core, all Apache-2.0, all on github.com/tenstorrent.
  • The pieces are separable, and proven on public RTL. rv_tester runs CVA6 and OpenC910 in lockstep against Whisper out of the box; Verilator is the default, so nothing stands between a team and a first run. Adapt one component into an existing flow, or take the whole chain.
  • The same four roles scale down to a unit. The open-source MMU testbench reuses RiESCUE for live page-table generation, Whisper’s translation engine as the reference, and a DUT-agnostic scoreboard — showing the pattern isn’t tied to full-core verification.