Sasa Stamenkovic

About the Speaker

Sasa Stamenkovic is a Principal Engineer and Formal Verification Leader at Pure Silicon Solutions, with 15 years of experience in hardware design verification and formal verification. Since graduating with an MS in VLSI Engineering from the University of Novi Sad in 2010, he has focused his career on formal methods, continuously adopting and developing new verification methodologies and techniques.
Before joining Pure Silicon Solutions, Saša spent more than a decade at OneSpin Solutions and Siemens, working with semiconductor companies and engineering teams to apply formal verification to complex hardware designs. His experience spans a broad range of designs and verification challenges, with a particular focus on developing practical formal verification solutions that help teams achieve confidence and convergence on complex designs.

Holistic Verification in the AI Era: Scaling Formal and Empowering Engineers

Overview

Modern SoC verification demands more than a single methodology. This presentation explores a holistic approach that combines targeted formal verification, scalable simulation, deep collaboration between verification and design teams, and guided AI acceleration. Through practical examples, we examine how decomposition and sound abstraction make formal verification effective on complex designs, while dual-runnable environments help connect formal and simulation. We then explore how AI agents can act as supervised “junior engineers,” accelerating testbench development, environment bring-up, and counterexample triage. The result is a verification strategy that scales engineering capacity while keeping human expertise and design intent at its core.

Key Points

• Formal Verification
• Design Verification
• AI