Vinoth Selvan
Senior Design Verification Engineer,
NVIDIA Corporation
Senior Design Verification Engineer,
NVIDIA Corporation
Vinoth Selvan is a Senior Design Verification Engineer at NVIDIA, leading pre-silicon performance verification and silicon-correlated validation for high-speed interconnect architectures. With 15 years of semiconductor design verification experience, including a decade at NVIDIA and earlier roles at Intel and Qualcomm, he has worked across clocks and reset, error resiliency, power management, performance verification, and silicon bring-up/debug for complex workload-driven performance issues. His recent work focuses on agentic AI, MCP-based debug infrastructure, reusable verification Skills, and evidence-driven RCA workflows that improve performance analysis from RTL through silicon. Vinoth holds an M.S. in Electrical Engineering from the University of Minnesota, Twin Cities.
Overview
Performance root-cause analysis becomes harder as designs move from RTL to full-chip validation and silicon, where evidence sources, observability, and debug workflows differ. This talk presents an agentic RCA methodology for performance verification that uses AI to orchestrate a controlled evidence loop across trusted tools and reusable debug procedures. MCP tools provide structured access to platform-specific measurements, while Skills capture expert playbooks for bandwidth analysis, latency investigation, clock/configuration checks, and bottleneck isolation. The flow produces a reproducible RCA report with supporting evidence, confidence basis, and the next decisive action, enabling faster, more consistent performance debug across platforms.
Key Points