About the Speaker

Steinn Gustafsson is the founder and CEO of Chevin Technology, a specialist developer of secure, high performance FPGA and semiconductor IP for defence, aerospace, and scientific applications. He has over 25 years of experience in FPGA technology and RTL design, spanning communication systems, signal processing, ASIC development, and hardware security. Steinn has led multiple industry and research collaborations and is the inventor on several patents. He currently focuses on security by design methodologies that integrate verification, authentication, and authorization directly into reusable IP architectures.

Verifying Reusable and Secure IP in Complex FPGA and ASIC Designs

Overview

As FPGA and ASIC systems scale in complexity, verification increasingly dominates development cost, schedule, and risk. Designs now integrate heterogeneous, multi vendor IP across multiple semiconductor platforms under stringent security constraints, challenging traditional verification when IP is encrypted, reused, or developed by distributed teams. This paper examines how IP XACT (IEEE 1685) improves verification planning, integration correctness, and automation, and evaluates IEEE 1735 v2 encryption from a verification standpoint, highlighting trade offs between security and observability. A case study from STFC RAL demonstrates verification strategies for encrypted third party IP and system level regression. Finally, the paper shows how Security by Design enables verifiable, RTL embedded hardware authentication.

Key Points

• Use of IP XACT (IEEE 1685) to enhance verification consistency, automation, and integration correctness across reusable IP
• Verification challenges introduced by IP encryption (IEEE 1735 v2), including observability, debug limitations, and regression strategy
• Verifiable Security by Design: hardware based authentication and authorization embedded at RTL level