About the Speaker

Marcel Ahmedzai is an Architect Application Engineer at Cadence Design Systems, based in the Northern Europe team. With over two decades in the semiconductor industry, Marcel brings deep expertise in front-end analog and mixed-signal tooling. He began his career as a CAD engineer at Mitel Semiconductor and Zarlink Semiconductor, developing in-house tools to support chip design before transitioning into dedicated Cadence tool support. Since joining Cadence in 2004, he has become a trusted resource for application engineering across the analog and mixed-signal verification domain. Marcel holds a Bachelor’s degree in Mathematics from the University of Hertfordshire. He is widely respected among peers and customers alike for his deep technical knowledge, collaborative approach, and ability to solve the most challenging verification problems

Accelerating Mixed-Signal Verification with Virtuoso ViraStack

Overview

Mixed-signal verification remains one of the most resource-intensive stages of the design cycle, with the analog solver representing a critical performance bottleneck. Convergence failures, often rooted in modeling insufficiencies, further compound simulation runtimes and demand extensive domain expertise to diagnose. Cadence ViraStack AI Super Agent introduces an intelligent, AI-driven approach to overcoming these challenges — automatically identifying convergence root causes, recommending targeted corrections, and significantly accelerating debug turnaround. This presentation demonstrates how Virtuoso ViraStack transforms mixed-signal verification workflows by reducing manual intervention, shortening debug cycles, and enabling engineers to resolve complex convergence issues with greater speed and confidence.

Key Points

• Mixed-signal verification is a major bottleneck – Analog solvers and convergence failures drive costly simulation delays
• Virtuoso ViraStack brings AI-driven automation to convergence debug – Virtuoso ViraStack auto-identifies root causes and recommends targeted fixes
• Faster debug cycles with greater confidence – Less manual effort, shorter turnaround, more reliable results