Job Description

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DFT- Design Lead /Sr. Design Lead

30-11-2022 13:29:08

Tessolve Semiconductor Private Limited

Digital Design 2

Regular Employee - Probation

Design Lead

  • Noida, Uttar Pradesh, India (TESIN-ND)
  • Ekkaduthangal, Chennai, Tamil Nadu, India (TESIN-ECH)
  • Electronic City, Bengaluru, Karnataka, India (TESIN-EC)
  • JP Nagar, Bengaluru, Karnataka, India (TESIN-JPN)
  • Jubilee Hills, Hyderabad, Telangana, India (TESIN-HYD)
  • ORR, Bengaluru, Karnataka, India (TESIN-ORR)
  • Whitefield, Bengaluru, Karnataka, India (TESIN-WF)

8 - 12 years

Title/Position: DFT-Design Lead /Sr. Design Lead

Location:India and Onsite

Education:B.Tech/ M.Tech


KeyResponsibilities:

·     Work closely with Business Unit head in defining strategy for the BU

·     Responsible & accountable for engineering execution and deliveries for customer projects across globe

·     Work proactively with different stake holders in the organization for successful execution and project reporting

·     Work proactively with HR team for hiring talented and capable engineers to fulfil the business needs

·      Mentor the teams’ growth & create a conducive environment in the BU for their success

·      Support sales team in customer facing activities, proposal preparation to win business


KeySkills:

·       Bachelors in Electronics Engineering isa minimum requirement

·       Masters in Electronics or ComputerScience Engineering is an added advantage

·       8+ years of Industry experience in theindustry

·       Exposure to working in multi-nationalenvironment is required

·       Should have handled teams comprising ofhardware & software engineers

·       Should have expertise in handlingsenior managers, managers & team leads

·       Excellent oral and writtencommunication skills is a must

   ·        An attitude to learn andgrow. Adaptability and flexibility is desired 

To besuccessful in this role you will:

Seekinghighly motivated, energetic, team-oriented Individual contributors willing totake the challenge of delivering of complex IPs using the latest advanceDesign for Test skills and Tools. 

TechnicalSkillset Required:

·        Good knowledge in DFT Skills

·        Sound knowledge in DFT Architecture and hands on in Scan , ATPG , Simulation & GLS .

·        Prior experience in Synsopsys or Cadence or Mentor tools  Like Tetramax, Modus ,Tessent  and DC tools

·        Hands on in MBIST insertion and simulation

·        Knowledge  on JTAG is an added advantage .

·        Good Simulation debugging skills

·        Technical Documentation: uArchitecture Specification, SoC Integration Specification

·        Good exposure to Scripting skills like Perl or Python or Shell or TCL 


About us:

Tessolve Semiconductors, a venture of Hero Electronix,is a Design and Test Engineering Service Company providing End to End Solutionsfrom Product Engineering, Software, Hardware, Wireless, Automotive and EmbeddedSolutions.

Tessolve offers a unique combination of pre-silicon and post-siliconexpertise to provide an efficient turnkey solution for silicon bring-up, specto the product. With 2500+ employees worldwide.

Tessolve provides a one-stop-shop solution with full-fledged hardwareand software capabilities, including its advanced silicon and system testinglabs. Tessolve offers a Turnkey ASIC Solution, from design to packaged parts.We have a global presence with office locations in the United States, India,Singapore, Malaysia, Germany, United Kingdom, China, UK, Japan, Thailand,Philippines, and Test Labs in India, Singapore, Malaysia, Austin, San Jose.

Tessolve offers a highly competitivecompensation and benefits along with an electric work environment to scaleone’s intellect, skills and growth.