Job Description
Sr. Test Engineer 1 (Sr. Silicon Validation Engineer 1)
09-01-2023 15:29:26
Tessolve Semiconductor Private Limited
Test Engineering
Regular Employee - Confirmed
Sr. Test Engineer 1
- Asilmetta, Vishakhapatnam, Andhra Pradesh, India (TESIN-VIZ)
- Electronic City, Bengaluru, Karnataka, India (TESIN-EC)
2 - 8 years
TessolveSemiconductor Private Limited
RegularEmployee - Confirmed
Department: TestEngineering
Location:
ElectronicCity, Bengaluru, Karnataka, India (TESIN-EC)
Asilmetta,Visakhapatnam, Andra Pradesh , India ( TESIN – VIZ)
Description:
CompanyGroup
TessolveSemiconductor Private Limited
Department
TestEngineering
EmployeeType
Regular Employee - Confirmed
Designation :- Sr.Test Engineer 1
Requirements:
· Test Engineer with minimum 2- 8years of experience in semi-conductor testing
· Responsible for working withdifferent teams for understanding the device datasheet and come up with adetailed Test procedure/plan to test the chip in ATE environment
· Need to interact with the PCBdesign team for developing the necessary hardware – Test load board, benchboard, handler boards and probe cards
· Should be responsible fordeveloping the complete ATE test programs to validate the chip
· Should involve in developingthe test methodologies as required
· Successful completion ofprojects within the scheduled time
· Strong critical-thinking andproblem-solving skills
· Development and debug of testmodules at both package and wafer level.
· Correlation, customeracceptance and Project Release to Production
· Expertise in one of the ATEplatforms like Teradyne ETS88/ETS364/UFlex/J750/IP750, Advantest V93K, T2K,National Instruments STS, Chroma, LTX Credence platforms is mandatory
· Experience in other ATEplatforms will be an advantage
· Team Management experience willbe an advantage
Responsibilities:
· Work with design/DFT team todevelop the detailed test procedure from device data sheet
· Design and develop the requiredtest hardware - Load board, bench board, Qualification board and probe card
· Develop the ATE test programfor device debug
· First silicon verification anddevice bring up using ATE tools and bench equipment
· Device characterization acrosstemperature, voltage and process corners and validate the chip against thespecification
· Responsible for releasing theFinal production quality test program to the customer (both wafer and packagedevice test programs)
· Qualify the test solution byperforming GRR, Spike check, Failure simulation and Test Time optimization
· Interactions with theDesign/DFT team throughout the project execution
· Interact with the customer on aday-to-day basis and provide status update through e-mails and conference calls
· Experience in test program releaseprocedure at production test house
· Responsible from the beginningto the Final test/Wafer Test program release at customer site
AboutTessolve
Technological innovationhas accelerated at an unprecedented pace in the recent years and so have thedisruptions in the sector of Silicon engineering – complex IC development,increasing failures, inadequate facilities for design, development and testing.At Tessolve, we address these disruptions, helping Semiconductor productcompanies in Semiconductor IC Design, Test & Product Engineering, PCBDesign, Failure Analysis and Systems design. An enabler of smooth design andproductization of chips, we leverage our in-house infrastructure, qualityexcellence practices and cost-effective approaches to bring value drivensolutions and services. https://tessolve.com/