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News & Events

News & Events

Welcome to Tessolve News & Events. Here you’ll find information on Tessolve including recent announcements, upcoming events, press release etc., we invite you to take a few minutes to browse the site to learn more about what’s latest at Tessolve.

Qualification : BE/B.Tech/ME/M.Tech (ECE/EEE stream)
Experience : 2 - 6 years
No of Position : 25

Requirements :

Keywords:

  • Hardware design engineer - Board design (Digital, Mixed signal, RF,High Speed).
  • Hardware Application engineer.
  • FPGA testing using JTAG/BoundaryScan.
  • System level testing.
  • Embedded testing & debugging.


RFIC: Experience of testing RF circuits (LNA, PLL, PA and should be able to test RF parameters like phase noise, gain, ACPR, Inter-Modulation Distortion)

PMIC: Power management systems design / debug / testing / integration of Buck/Boost/Buck-boost/LDOs, precision references, battery charge controllers, lighting systems, current sources and sinks, and crystal oscillators.

Mixed Signal: Experience with Mixed-signal blocks like ADC, DAC and PLL blocks and their measurement techniques such as INL, DNL, Gain and Offset Error, SFDR, THD+N, ICN, Jitter, Phase noise, Lock time etc

High Speed: Experience with High-Speed SERDES (USB, DDR, SATA, PCIe,SGMII/QSGMII, MIPI PHY , HDMI, LVDS,eDP).Knowledge on Signal Parameters like eye diagram, Overshoot, Undershoot, DC Threshold multi-crossing etc

Hardware Board Design: Fundamental understanding and hands-on experience with analog and digital electronics and help routing on PCB with SI analysis

FPGA: Design/Integrate application circuits using FPGA/Microcontroller programming and familiar with process like ICT, JTAG, I2C, SPI and AXI

System Level Testing: Extract the system level parameters of SOCs/Application circuits or Transceivers. Determine the best way a test can be performed in order to achieve 100% test coverage of all components using different test processes

Experience in troubleshooting and ability to resolve issues in test setup

Ability to work with common lab equipment such as power supplies, oscilloscopes, spectrum analyzers, logic analyzers, JTAG debugger, frequency counters, etc.

Responsibilities :

Design Engineer - Responsibilities :
Responsible for designing, developing, and implementing cost-effective systems with hi-speed interface standards.Prepares test and diagnostic programs, designs test fixtures to perform the System Testing & delivery, Mentoring Junior Engineers and identify Training Requirements for the team members.The job involves device level debug and bring up, co-ordination with Device vendors, Lab Characterization of the System developed, Device programming / testing new device samples for customers, board debugging etc.

Test Engineer - Responsibilities :
Develop ATE test solution for semiconductor ICs in different domains as Power management / Digital / Mixed signal or RF.Be a primary contact to interact with customer / vendors (design / support teams).Work with design/DFT team to develop the detailed test procedure from device data sheet.Develop and lead the hardware design activity (Probe cards / Final test load boards), develop schematics, provide placement / layout guidelines to PCB design engineer.First silicon verification and device bring up using ATE tools. Leading ATEs from Teradyne, Advantest etc (Uflex, 93K etc).ATE software development as per test procedure document (C, C++, Perl, VB etc).Device characterization across temperature, voltage and process corners, and validate the chip against the specification.Responsible for releasing the Final production quality test program to the customer, both wafer final test program. Interact with the customer on a daily basis and provide status updates through e-mails and conference calls.Responsible from the beginning to the Final test program release to production.

Tessolve is NI STS Specialty Partner for worldwide applications support and solutions development. Tessolve has established two STS Test Systems in the Test floor to support engineering development 24/7, supported by well-trained team of 20 engineers.

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We provided a sneak peek into some of test solutions developed by Tessolve on the NI-STS system. We offered an experience to several challenges faced and case studies of test engineering solutions done by Tessolve for a variety of semiconductor ICs.

20th May 2017 to 28th May 2017

Tessolve has come up with a series of ultra-low power System-On-Module based on the NXP i.MX family which is powered by ARM Cortex A9 CPUs in 2014.

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Tessolve Embedded system introduces a series of ultra-low power ARM System-On-Module based on the NXP i.MX family which is powered by ARM Cortex A9 CPUs.

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India Electronics & Semiconductor Association has scheduled its annual flagship event IESA Vision Summit 2017 on Feb 21 & 22, 2017 at Hotel Leela Palace, Bangalore. The theme of the event is “Design led Manufacturing – Redifining the future of India’s ESDM”

 

Tessolve Semiconductor is the Platinum sponsor for this event. Mr. Ujjwal Munjal, Founder Director of Hero Electronix & Mr.P.Rajamanickam, Founder & CEO of Tessolve are among the key speakers.

 

Highlights of Vision Summit 2017

•   Over 50 speakers

•    Makeathon on AR & VR

•    Makeathon on Industrial IoT

•   Technovation Awards

•   Makeathon Awards

•   Representation by policy makers: both states and Central and country delegations

•   900+ Delegates from Semiconductor cos., Start-ups, Electronics Manufacturing, System Integrators etc.

•   CEO meet & Greet

•   50 ESDM start-ups Showcasing products

•   Exclusive event coverage by media and Social media


Opening of NI Lab


Lecture on “Beyond Moore’s Law"

Tessolve inaugurated its new branch office at Vizag on 6th May 2015 with an engineering team size of 12 members. The engineering activity will focus on PCB design and Packaging design initially. The team size will ramp up with more projects in the coming quarters for PCB, packaging and software engineering team activities.

 

FETNA conference where Raja received an award for his contribution to entrepreneurship at the Tamil Entrepreneurship Forum on July 3,2015

 

Chennai, June 30, 2015: Kalasalingam University (KLU) in Tamilnadu is to offer an advanced M. Tech. programme in VLSI design, test and manufacturing in association with Bengaluru-based Tessolve Semiconductor.

 

The curriculum for the course has been designed by Tessolve in consultation with KLU, anticipating the current and future industry trends. A memorandum of understanding for offering the course was signed on Monday by university Chancellor K. Sridharan and Srinivas Chinamilli, Co-founder and President of Tessolve Semiconductor.

 

 

 

News video about the launch event can be accessed here.

For more details about the course, please refer the course brochure here. To go to KLU main website click here.

 

An M.Tech degree programme that assures a paid internship and a valuable career at TESSOLVE.

 

The Kalasalingam University (KLU) in partnership with Tessolve Semiconductor Bangalore, offers a unique M.Tech programme in VLSI Design, Test and Manufacturing. For more details, please refer the course brochure here. To Apply for this M.Tech programme on KLU website Admissions page, click here. To go to KLU main website click here.

 

March 2015: Silicon India (www.siliconindia.com) has selected Tessolve Semiconductor (www.tessolve.com) in its 20 Most Promising Semiconductor Solution Providers. The positioning is based on Tessolve’s engineering expertise in the areas of Semiconductor Design, Test/Product Engineering, PCB Design, Failure Analysis and Systems design.

 

To read the Article click here.

To read the Press Release click here.

November 5, 2009, Tessolve Semiconductor Pvt. Ltd. today was named a recipient of SiPort Corporation’s Supplier Appreciation award for outstanding and dedicated support which enabled SiPort to become the #1 HD radio silicon company.

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Semi indicating Tessolve article on SEMI Semiconductor Manufacturing magazine

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MOUNTAIN VIEW, Calif., Aug. 28 /PR Newswire-FirstCall/ --Synopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software, today announced that Tessolve has adopted Synopsys' DFT MAX scan compression solution to reduce the costs of semiconductor testing and diagnostics

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MOUNTAIN VIEW, Calif., Aug. 28 /PR Newswire-FirstCall/ -- Synopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software, today announced that Tessolve has adopted Synopsys' DFT MAX scan compression solution to reduce the costs of semiconductor testing and diagnostics. DFT MAX automates creation of scan compression circuits on-chip that…

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Tessolve Semiconductor specializes in providing world class and cost effective solutions for test development, failure analysis, and reliability test for …

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Tessolve Semiconductor Malaysia (TSM) participated in this event which was organized by Semi Singapore from 25th April 2017 to 27th April 2017. Participants from several Asian countries took part in this event ranging from various Engineering fields.

TSM booth was set up with our Engineering services portfolio as well as our newly acquired PCB Fabrication plant with PCB boards displayed during the 3-day exhibition. We had several enquiries expressing interest in our Product portfolio as well as our design capabilities in PCB Fabrication. There were several card exchanges and interactions between our Technical staff who were stationed during the 3-day duration as well as potential customers.

The annual flagship event of India Electronics & Semiconductor Association (IESA) at Bengaluru, India was held on on Feb 02-03, 2015. The IESA Vision Summit provides an ideal platform for business leaders, strategists, policy makers and technology experts to explore the trends, challenges, and opportunities shaping the Indian semiconductor & electronics industry today.

 

Mr Rajamanickam and Mr Srinivas Chinamilli were among the distinguished speakers in the panel discussion: “Fuelling the Wheels of Change - the essentials”, during the event, that discuss the role played by key sectors in fuelling the wheels of change set in motion by various favourable factors in the country and transforming India into a self-reliant global hub for electronics and semiconductors.

 

Tessolve participated in the Deftronics expo at BIEC Bangalore on 23rd and 24th September 2014 showcasing the breadth and depth of services offered by the company to a wide range of prospective customers in the Defense industry.

 

In April 2014, Mr Karthik Chellappa, Test Lead, successfully presented a paper on “Test Optimization for Dual RX RF Transceiver” at the Teradyne Users Group Conference, TUG2014, at Anaheim, CA, USA. Abstract can be seen here.

On 11th Sep. 2013, Mr D Rajakumar, Director – Test Engineering-Tessolve presented a paper at ITC-2013 about "Lower-Cost Test Solution for CMOS Image Sensor Wafer Sort". It was presented under ADVANCED INDUSTRIAL PRACTICES SESSION-4 (AIP 4), which was conducted in the category of LOW COST TEST WITH HIGH END TESTERS. The TOC of the proceedings is available here.

 

PCB Technology Day 2012 was organized by Mentor Graphics at Hyderabad(15th May 2012) & Bangalore(17th May 2012). Tessolve Semiconductor participated in this event being as authorized distributor to Sale & Support Mentor products in India. Participation from more than hundreds of people from Defence, Space labs, PSU & Industries made this event a grant success.

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